A few months ago. Looks like DSP (hardware multiply-accumulate units) is partially supported now if VexRiscv is synthesizing, but there's still some open issues on their tracker about whether they understand them fully or not.
I afraid I don't recall the status of DSP blocks in the open source toolchains for Xilinx hardware. Even if the basics are supported I'm sure there are plenty of DSP features that are not.
Many configurations of VexRISCV work fine without using the DSP blocks (and has been working for 2+ years), so not sure that is relevant.
