A bit of a nitpick - LiteX still mostly needs Vivado installed for now for 7 series FPGAs. There's a project that's very far along in reverse engineering the Xilinx bitstream (https://github.com/f4pga/prjxray), but it's still missing many features (PCIe, SERDES, hardware multipliers, etc.). You can run on the open source toolchain but you lose so many of the reasons to actually use a Xilinx FPGA.
The only fully supported reverse engineered FPGAs at the moment are the Lattice ECP5(-5G), iCE40, and QuickLogic EOS families.
When did you last check? The Yosys+VPR toolchain currently supports a full Linux capable SoC with Ethernet and DDR memory on the Arty A35T (which has a Xilinx Artix 7 part), see the example at https://f4pga-examples.readthedocs.io/en/latest/building-exa...
A few months ago. Looks like DSP (hardware multiply-accumulate units) is partially supported now if VexRiscv is synthesizing, but there's still some open issues on their tracker about whether they understand them fully or not.
I afraid I don't recall the status of DSP blocks in the open source toolchains for Xilinx hardware. Even if the basics are supported I'm sure there are plenty of DSP features that are not.
Many configurations of VexRISCV work fine without using the DSP blocks (and has been working for 2+ years), so not sure that is relevant.
Please note these are unavailable for awhile. I actually tried ordering one of these ~18 months ago but the developer says he can't source the large FPGAs due to component shortages. I ended up settling for the reduced version (XC7A100T versus XC7A200T) called LiteFury which was still available at the time.
The Acorn CLE-215 is equivalent to the NiteFury (XC7A200T-2) if you can get your hands on one, and the CLE-215+ is the same size but a higher speed grade (XC7A200T-3). You can officially do DDR3-1066 on the plus model and DDR3-800 on the non-plus model.
So I was recently thinking of playing around with an FPGA for shits and grins. Try out embedded console emulation and try some basic development stuff and so on. I'm not super terribly concerned about maximum efficiency/recent node, but a decent number of logic cells would be preferable and ideally a decent output (DP 1.2 or HDMI 2.0), and ethernet might be a plus (but that one is negotiable). Does anyone have any recommendations for a decent dev board? Used/ebay is fine, would like to keep it to maybe a couple hundred bucks, or at least like, under $500.
My understanding is all FPGA toolchains are a nightmare, and I'm guessing I may have to pirate the software, no chance of me affording a $10k-a-seat license for a toy that probably won't go any farther than a couple nights of tinkering.
What exactly are you aiming to build? DP/HDMI output and Ethernet aren't exactly beginner topics in FPGA (though you may be able to cobble something together using pre-existing components).
The DE10-Nano gives you both HDMI (though not 2.0) and Ethernet: https://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=.... There's some availability, apparently buying direct from Terasic is the best option (though often more expensive as shipping is pricey and you pay import duties). It's also what the MiSTer project uses https://github.com/MiSTer-devel/Main_MiSTer/wiki so is what you need if you want to play with console emulation.
FPGA toolchains are indeed a nightmare but both Xilinx and Intel have freely available versions. They tend to be limited in the devices they support but the free versions of Vivado (Xilinx) and Quartus (Intel) both support the FPGAs in the boards I mentioned above.
I have a couple of the ULX3S boards with a Lattice ECP5 FPGA and would highly recommend them. They also support a fully open source tool chain and have a great community.
https://www.crowdsupply.com/radiona/ulx3s
My iCE40UP5K-B-EVN devboard is still in its box; I still haven't run so much as "blink" on it. So I can't recommend it from experience, exactly. But it does have some advantages:
2. It's in stock despite the shortage. Or it was, anyway. Maybe a different distributor has them in stock.
3. It's fully supported by free software (APIO, yosys, nextpnr, etc.) and there are tutorials for getting things to run on it without getting contaminated by licenses.
4. Although it's still really small as FPGAs go, the iCE40UP5K is the largest FPGA that is fully supported by free software: 5280 logic blocks (one 4-LUT, one D flip-flop, and some carry propagation logic per block), 120 kbits of EBRAM, 1024 kbits of SPRAM, and 8 16×16 multipliers. According to the datasheet, it's not super fast, 25–150 MHz for a lot of designs, and the multipliers in particular are 50 MHz; configured for extremely basic functions like a 16-bit decoder you can get pin-to-pin performance of under 20 ns. This seems like plenty of power for emulating a Super Nintendo or something, but not an XBox. The SeRV implementation of RISC-V fits into I think 200 iCE40 4-LUTs. The UPduino is another cheap devboard featuring the iCE40UP5K.
Astoundingly, someone has gotten HDMI output out of an iCE40 with a relatively simple level shifter to handle the translation to current-mode logic and the iCE40's DDR outputs to get 250MHz output: https://hackaday.io/page/5702-dvi-hdmi-pmod-for-an-ice40-fpg... Presumably, though, you'd be better off with a beefier FPGA for which HDMI isn't such a stretch.
I'm thinking that probably even if you had the US$12000 for a Virtex-7 devboard and a Vivado license to synthesize designs for it, you might be better off starting with smaller designs anyway, because in a couple nights of tinkering you won't be able to get anything working that the iCE40 can't do.
> Presumably, though, you'd be better off with a beefier FPGA for which HDMI isn't such a stretch.
Another option is an external HDMI serializer. You send it a parallel video signal, similar to what you'd send to a VGA DAC, and it handles all the details of turning that into HDMI.
Yeah, I was wondering if an external SERDES and some level shifters would be enough.
Also though you could literally generate a VGA signal with an R-2R DAC and feed it to a VGA-to-HDMI adaptor. These apparently cost US$10 and are available in the kind of stores that sell USB hubs and fake SD cards: https://articulo.mercadolibre.com.ar/MLA-897320291-cable-ada...
> Also though you could literally generate a VGA signal with an R-2R DAC and feed it to a VGA-to-HDMI adaptor.
The breakout I linked is only $20, and uses virtually the same electrical interface as a VGA DAC. (The only difference is that it also takes a clock signal.) You'd hardly be saving any money with the janky VGA-to-HDMI setup, and the image quality would be worse.
Agreed, but the shitty electronics store around the corner from me doesn't have the breakout you linked in stock, and if I try to get it shipped from overseas they'll ask me to pay with a credit card I don't have, and then it will get held up in customs and probably returned to the sender.
Third world problems, I know, but they're still real problems.
Correcting an error: evidently the iCE40UP5K is no longer Lattice's largest iCE40; https://news.ycombinator.com/item?id=32199137 mentions an out-of-stock SparkFun breakout board for the iCE40LP8K, which is about 50% larger. And it's at least two years old!
I feel like there's probably some market for something even smaller than today's FPGAs.
I'm picturing situations where you might use a handful of 74xx components to perform a task, but start getting bogged down by factors like "I can't fit 15 chips on my breadboard and even if I did, I'd probably mess up the wiring accidentally".
A full "software at runtime" microcontroller solution introduces its own nuances (having to load and initialize, potential timing factors), even if the price is right.
A still-in-production commercial-grade FPGA means replacing $10 of parts with $100, so it's not really hobbyist-friendly, and may be wildly overkill for the task.
I guess maybe the PAL/GAL ecosystem is sort of what I'm envisioning, but it seems like a dead-end of obscure tools and parts labelled "not suggested for new designs". Or maybe there's a yet-to-be-tapped market for a small-scale hobbyist FPGA that's priced accordingly.
In between the dead PAL/GAL ecosystem and today's FPGAs, you have CPLDs. A 32-macrocell 15-nanosecond ATF1502ASV will run you US$2.42 from Digi-Key https://www.digikey.com/en/products/detail/microchip-technol... and a 64-macrocell 10-nanosecond 3.3-volt M4A3-64 will run you US$6.90 https://www.digikey.com/en/products/detail/lattice-semicondu.... You can replace a heck of a lot of 74xx components with a 64-macrocell CPLD, the software tooling for CPLDs is significantly less antiquated than the PAL/GAL tooling, and the designs are as open as the PAL/GAL designs.
The thing is, though, if you can stomach a BGA, a 640-LUT iCE40UL640 FPGA is only US$2.80 via Digi-Key https://www.digikey.com/en/products/detail/lattice-semicondu..., so it's hard to justify using a CPLD instead in a new design. Maybe easier since the shortage crisis. But that's a "still-in-production commercial-grade† FPGA" and it's US$2.80 in parts, not US$100. A reel of 1000 is US$2340.
Is this the small-scale hobbyist FPGA you're looking for? I think you can fit two or three RISC-V controllers on it with SeRV, and it includes 56 kbits (7 KiBytes?) of EBRAM.
(Disclaimer: I don't actually know any of this stuff, I'm just repeating things I've read without really understanding them.)
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† I'm not sure what you mean by "commercial-grade"? I mean it's not a university research project? Lattice is a commercial company and sells the iCE40UL640 as a commercial product.
"Commercial grade" was a terrible choice of words, I know. I guess I was looking for "currently on offer, and in a phase of lifecycle where you could design a long-lifecycle product around it without a panicked mid-life crisis to replace the chip when supplies ran out." Not "15 year old parts that have deprecated to the point where they're hobbyist-priced".
I suppose another big problem with a lot of more sophisticated offerings is, as you suggest, BGA may be hard to stomach. Anything more complex than through-hole packages, or socketable versions is going to dramatically raise the bar for "this can be shipped as a kit and home-assembled." The PLCC one might be viable from that context.
Yeah, the "we'll drill your PCB" houses will also tack down your SMD parts, but it changes the proposition. Instead of selling a $10 blank PCB and saying "order what you need from Mouser" you suddenly have a lot more money sunk in partially or fully assembled inventory.
I don't know what Lattice's life cycle for its products is but given that they're evidently still making CPLDs from 30 years ago I wouldn't worry too much. I think these particular FPGAs are only about 7 years old, too; the datasheet (DS1050) lists two revisions, both from 02015, and I recall looking for such low-end FPGAs around that time and not being able to find any.
The last time I went to an electronics hobbyist store I was amazed to find that everything was on breakout boards. They didn't sell chips, they sold boards, all with 2.54mm Molex pin headers on them, or sometimes rows of holes for you to solder the pin headers to. It was so extreme that they had a ULN2003 septa-darlington on a breakout board, by itself, with a pin header connected to each of its pins. A DIP ULN2003! Which has 2.54mm pins on the actual chip!
So apparently electronics hobbyists now barely use breadboards or soldering irons. They wire together boards with jumper wires, using the pin headers that come pre-soldered to the board.
In that vein, it looks like SparkFun sells a Lattice XO2-1200 breakout board with 2.54 mm pin headers for US$21.50 https://www.sparkfun.com/products/14828 but they're out of stock, and a similar Lattice iCE40LP8K breakout board for US$41.95 https://www.sparkfun.com/products/14829 which is also out of stock. And, holy crap, that chip has more logic cells than the iCE40UP5K chip I erroneously thought was Lattice's biggest. And also the US$7.95 https://www.sparkfun.com/products/17131 in Adafruit's Feather wing footprint which is not out of stock and has an Intel MAX 10 FPGA along with an Atmel SAMD51 μC.
Anyway I feel like, if you wanted to ship an FPGA thing as a kit and home-assemble it, you could solder the BGA FPGA onto a small PCB with 2.54mm pin headers along the edges so the kit assemblers can plug it into their breadboard or connect wires to it easily. Basically the PCB takes the place of an epoxy or ceramic DIP and leadframe.
I'm not sure the traditional Heathkit-style "kit" market exists any more, though. 50 years ago you by buying the unassembled kit you were saving the salary of a lab technician in Benton Harbor who would have assembled, soldered, tested, and troubleshot your device by hand, at a cost of potentially over US$100. Now you're saving the cost of a pick-and-place machine at JLCPCB; they charge 0.15¢ per pin, last time I checked, with a minimum order quantity of 10 boards.
The benefit now of getting parts unassembled is not that it's cheaper; it's that you can assemble them into something different, shortening the feedback time on your own designs.
>I'm not sure the traditional Heathkit-style "kit" market exists any more, though.
IDK, I've been gradually working my way through some of the solder-it-yourself "build an XT clone" projects; there the fact you're building it from parts IS a big part of the charm. Nobody would want a slightly quirky DOS machine with less performance than an off-brand graphing calculator without a healthy dose of the IKEA Effect. I suspect a lot of the "build your own amplifier" hobby groups are the same way. (Speakers, apparently there's still money to be saved there if you like DIY offerings)
In a way, it's about turning "thing you buy" into "thing you do" -- you get more hours of entertainment out of a given dollar spent on kit products than a similarly priced finished item would provide.
Yes, 50 years ago, building from kits was about saving on assembly (or for access to products not sold assembled), but there's no reason it can't be a hobby in and of itself and potentially a gateway into more sophisticated electronics experimentation.
I figure a good kit is like the programs in an '80s computer magazine-- it will do what it said, but now you have something that you can grasp and pull apart more readily than commercial product. How many of us got into programming that way?
The other drawback to getting things pre-assembled is that bodge issues are going to be harder. The last PCB I ordered (a custom-designed memory board for that XT clone) needed some, and if you're still looking at a bare PCB, maybe with through-hole sockets mounted, you can pretty easily do any cuts and tacked down wires you need. I'd be a lot warier if I had to try to pick apart pre-soldered SMD components.
Commerical grade refers to the temperature range the component is tested to work. Amusingly it is the lowest grade where you can get industrial grade, military grade or even space grade components.
I tried to work with those lattice parts once but they were so tiny (0.3 or 0.4mm pitch bga) basically undoable by cheap Chinese hobbyist board houses.
This is the perfect use case for the Lattice MachXO3 and similar parts. The software doesn't require a licence for the low end parts, and they are cheap and simple to use.
These guys target the education market and most of their boards are compatible with the free version of the Xilinx toolchain. The boards have a modular expansion connector and they sell lots of compatible expansion modules for different I/O mechanisms, both electrical and human (lights, buttons, displays, etc.)
The Xilinx webpack is free for hobbyist level devices. You can implement a lot before you hit its resource limits. Also, in the past (don't know about now) you could get a version of Modelsim with the Altera Quartus toolchain. It could be used with Xilinx simulation libraries as well, although that technically is a license violation.
If you've been tinkering with console emulation then you may have heard of MiSTer, which runs on a DE10-Nano (Intel Cyclone V-based board by TerasIC). It has 110K LEs and costs $225. Resellers are out of stock but I bought two directly from terasIC last month and they shipped within a week.
Xilinx/AMD basically provide their toolchain for free for most devices. You only have to pay when you are trying to design using the largest highest performance devices.
If you haven't done FPGA work before, you certainly want to start with something small and cheap - it will keep you busy for a long time learning a completely different type of development process.
Lattice ECP5 is popular with hackers because there is a reasonably well supported open-source tool chain via Yosys. As tempting as an open-source toolchain is, it is NOT friendly for beginners. You can also use the Lattice Diamond software which includes ModelSim for free (it needs a license, but you can get it by registering for free). If you go that route, I really like the Orange Crab dev board https://1bitsquared.com/products/orangecrab.
That being said, I really would recommend Xilinx for a beginner. The reason is that the toolchain is the least nightmare-ish and they have by far the best documentation and tutorials. Vivado is also free and contains a good synthesis tool and simulator as well as everything else you need. These are going to be much friendlier to the beginner.
All of the boards above contain USB based JTAG programmer and require no extra tools for debug and loading.
> My understanding is all FPGA toolchains are a nightmare, and I'm guessing I may have to pirate the software, no chance of me affording a $10k-a-seat license
Well, FPGA design is different than software. For small and medium-size parts, all the vendors have free or very cheap development tools now. All EDA software is very complex and less standardized than software tools. A lot of that is unavoidable. So certainly the toolchains are extremely challenging to learn. The quality of documentation ranges from pretty good (Xilinx) to useless (Microsemi) with most clustered around bad-to-useless. The tools also crash and misbehave in ways you'd never expect visual studio or GCC to do. But again, some of that is because it's comparably a niche market and because of poor vendor support. But a lot more of it is due to the very different and very complicated job the tools are doing, so try not to get overly frustrated - hardware is several layers deeper than software.
I've been looking for a cheap FPGA dev kit to teach classes with - pref something in the $20 range -
I just got one of these to play with, haven't had time to do anything with it yet
As a hardware engineer I think the vivado toolchain is brilliant, and way way better than the toolchians I have to put up with in ASIC design. The sad fact is low level HW design is very difficult, and making tooling help simplify this immensely hard. I don't know of a FPGA/ASIC toolchain that is better, do you? Compared to SW toolchians im sure it appears horrendous, but custom HW requires logic synthesis, clocking, timing, simulation, debug, with cross probing back to the source code at any point in the flow. Layering an SDK on top of this for embedded SW. It even has tools to help create hardware from C (HLS). Nothing else for HW I've seen is this well integrated or powerful. And it's for free. Sure people rag on it, but appreciation for the magnitude of what it is providing is difficult for those coming from a SW background
I think with FPGAs in general you'd have trouble getting to RPi4 frequencies (700MHz stock, with boosts on top of that), and I doubt you'd have enough resources (LUTs etc...) to implement all the features you'd find in a fully featured ARMv8 CPU (with 4 exception levels, a complex MMU and just an insane amount of configurable behavior in general).
Yes you kinda can with an FPGA, but you gonna generally be limited to how fast you can clock. The RPi4 clocks at like 1.5 Ghz with 4 cores, and if you want 4 fast cores that will eat up a lot area.
A pretty fast softcore is gonna be like 500Mhz, some really optimized designs might hit close to 700Mhz on better FPGAs. Although when working with softcores you can a lot times get away with lower clocks since anything that would require a lot of cycles if written in software can a lot times be made as a block on the FPGA that your softcore just manages. Assuming your FPGA has enough area. Freeing up the softcore to do other things.
I have a Google Doc at <https://j.mp/softcpus-on-fpgas> which includes a bunch of information about what type of performance has been achieved on modern Xilinx FPGAs.
Nope. The fabric in the Artix-7 series is much too slow. The max fabric clock (LUT outputs registered and connected to only one LUT in a neighboring logic block) is 400 MHz, but useful designs will be slower due to routing delays. Even "simple" in-order cores like VexRiscv top out around 200 MHz on the Artix parts. (classic 5-stage RISC pipeline + bypass). The numbers others are quoting are from much faster/newer/more expensive FPGAs like UltraScale(+). Series-7 is 10 years old at this point, but it's widely manufactured and will continue to be so for a long while due to the userbase.
But this isn't meant to be doom and gloom - the fact that you can buy a $200 board and go throw some verilog together and have it run at several hundred megahertz attached to a PCIe bus is phenomenal from a hobbyist perspective.
(The data from PCIe x4 @ 5 GT/s per lane can be carried by a 128 bit bus @ 125 MHz)
The terms aren't equivalent here. The maximum fabric frequency is defined in the FPGA's data sheet, but rather than defining bytes per transfer * clock speed over some bus, it defines the highest frequency signal that can be sent between two logic blocks of the FPGA. It's measured from the output of a register in one logic block, through the shortest path on the routing fabric, into a LUT that itself is registered. This is typically what the bottleneck for performance is on an FPGA. The logic block might only have a latency of half a nanosecond, but it could take another 2 ns to get the signal to the next logic block.
The RPi's CPUs operate at 1.5 GHz (1500 MHz) or higher, meaning there are 1.5 GHz signals being sent around inside the CPU. The logic in this FPGA under the most ideal theoretical conditions can only operate at around 400 MHz, and for a "real" design, much slower than that - hence my reference to VexRiscv. It's an extremely simple core by modern standards, clock-for-clock it's way slower than the ARM cores in the RPI, yet it's only capable of hitting 200 MHz in (this) FPGA.
To elaborate a bit:
An FPGA has a few major components, but from a logic perspective, the two to focus on here are the "slices" and the routing fabric. The slices of the FPGA implement user logic and are very simple. They contain a few LUTs (look up tables) which implement logic functions. In the case of the Xilinx 7 series architecture, these can be either 6 input 1 output logic functions or 5 input 2 output functions. Other FPGAs can and will be different. By "function", think logic gates. For every combination of inputs, is the output on or off? The logic blocks also contain a number of flip-flops to hold state. There is one for every LUT output, so twice the LUT count (on 7 series). There are a few fixed function components to improve performance of common logic types, such as the carry chain for an adder or multiplexers. Some FPGAs bundle hard-cores for various logic, many have hardware multipliers that can be used, more complex (and expensive) ones can even have CPU cores (Xilinx Zynq and Intel/Altera Cyclone V for instance).
There are thousands of these slices on an FPGA. The smallest member of the Artix family has 2,000 of them, the largest contains over 33,000. The big Kintex and Virtex parts can have hundred of thousands. In order to do anything complicated, you'll need to use many slices to implement logic, which are connected together through the logic fabric. You'll see things like "logic depth" which is the number of LUTs connected in series before connecting to a register. The greater the logic depth the slower the design. The shorter the logic depth, the longer the pipeline. Cue Netburst style concerns. If you don't have to worry about hazards, it's completely fine, if you do, it's a nightmare.
If you're looking for "fast CPU cores plus custom peripherals", something like the Zynq series might be a better choice; they have the same style of FPGA fabric as this board, along with dedicated ARM processor cores.
There would be a lot of work to do. The MiSTer project is made for the DE10-Nano, so it is made to work with that FPGA and that set of peripherals. MiSTer, in particular, needs the onboard arm to run support software, so you would have to replace that on this (perhaps with a RISC-V softcore you could build the MiSTer software for but lots of software work to do to make that work).
Correct me if i'm wrong, but these could be used for hash cracking as well right? With something like hashcat, which I think supports some FPGA boards. Maybe not the most memory intensive hash algorithms, but the rest should be relatively efficient to crack on something like this.
John the ripper was able to get some good results with a different FPGA:
"Added FPGA support for 7 hash types for ZTEX 1.15y boards...Specifically, we support: bcrypt, descrypt (including its bigcrypt extension), sha512crypt & Drupal7, sha256crypt, md5crypt (including its Apache apr1 and AIX smd5 variations) & phpass. As far as we're aware, several of these are implemented on FPGAvfor the very first time. For bcrypt, our ~119k c/s at cost 5 in ~27W greatly outperforms latest high-end GPUs per board, per dollar, and per Watt."
It would be a significant amount of work. The MiSTer project is specifically targeted at the DE10-Nano so it's designed for that FPGA and that peripheral set. In particular MiSTer relies on the onboard arm to run support software, you'd need to replace that on this (perhaps with a RISC-V softcore you could build the MiSTer software for but lots of software work to do to make that work).
It may also simply not be possible. The DE10-Nano has DDR memory for example but most MiSTer cores need extra add-on SDRAM. The reason being the latency on the DDR is just too high for the accurate emulate most cores are aiming for. So SDRAM is required. On this board you don't have that option. Though perhaps you can build your own DDR controller, with the DE10-Nano you have to use the hard controller built into the FPGA. Perhaps another controller specifically optimised for the latency needs of MiSTer cores could work. Each core would need potentially significant porting work to use this new setup as they get direct access to the SDRAM pins in MiSTer. You'd need to trace back to where they're actually generating memory accesses and then plug that into whatever new DDR controller you had.
There's also a small amount of IO pins on a high density header. I built an adapter that converts the LVDS voltage levels to TMDS so you can use it with HDMI or DVI - https://github.com/teknoman117/ACORN-CLE-DVI
Side note - this is the smallest pitch component I've ever soldered. Used a stencil and a hotplate since these are 0.4mm QFNs.
Edit - I really need to update the pictures. I forgot to twist the differential pairs before taking them.
The PCIe link definitely has plenty of bandwidth to stream uncompressed video to the host system—and if that host supports P2P DMA, it's probably even possible to push straight to VRAM without a round-trip through the host CPU's RAM. If there's enough room left on the FPGA, it could implement upscaling and CRT-emulating filters to provide a 4k stream to the host.
The downside is that you'd need custom drivers and software on the host system to redirect input events to the FPGA and handle the video feed it produces.
Artix-7 is supported by LiteX, an open-source toolchain based on reverse engineering of Xilinx bitstream, https://github.com/enjoy-digital/litex & https://antmicro.com/blog/2020/05/multicore-vex-in-litex/
These can be used for PCILeech DMA attacks/testing, http://blog.frizk.net/2021/10/acorn.html