This book by Stephen Marz seems to be a great addition to the Arpaci-Dousseau's "Operating Systems: Three Easy Pieces" (https://pages.cs.wisc.edu/~remzi/OSTEP/).

Stephen also wrote a great blog article series on building your own RISC-V OS in Rust (https://osblog.stephenmarz.com), so I'm really looking forward to reading his computer architecture book (and probably using it in my course).

RISC-V sure has effectively replaced MIPS and ARM in computer science education by now.

emu86 emulates x86, ARM, RISC-V, and WASM instruction sets in Python and in Jupyter Notebooks (which can be graded with ottergrader, nbgrader,)

assembler/virtual_machine.py: https://github.com/gcallah/Emu86/blob/master/assembler/virtu... :

- class RISCVMachine(VirtualMachine): https://github.com/gcallah/Emu86/blob/master/assembler/virtu...

- class WASMMachine(VirtualMachine): https://github.com/gcallah/Emu86/blob/master/assembler/virtu...

assembler/RISCV/key_words.py: https://github.com/gcallah/Emu86/blob/master/assembler/RISCV...

assembler/RISCV/arithmetic.py: https://github.com/gcallah/Emu86/blob/master/assembler/RISCV...

simd, avx, X86S, x86-64-v4,

x86-64 > Microarchitecture levels: https://en.wikipedia.org/wiki/X86-64#Microarchitecture_level...

The new x86 Alliance, Intel-AMD x86 ISA overhaul org.

"Show HN: RISC-V Linux Terminal emulated via WASM" (2023) and ARM Tetris: https://news.ycombinator.com/item?id=37286019 https://westurner.github.io/hnlog/#story-37286019

From https://news.ycombinator.com/item?id=37086102 :

> [ Bindiff, Diaphora, Ghidra + GDB, ]

> Category:Instruction_set_listings has x86 but no aarch64 [or RISC-V] https://en.wikipedia.org/wiki/Category:Instruction_set_listi...

> /? jupyter asm [kernel]:

> - "Introduction to Assembly Language Tutorial.ipynb" w/ the emu86 jupyter kernel which shows register state after ops: https://github.com/gcallah/Emu86/blob/master/kernels/Introdu...

> - it looks like emu86 already also supports RISC, MIPS, and WASM but not yet ARM:

> - DeepHorizons/iarm: https://github.com/DeepHorizons/iarm/blob/master/iarm_kernel...

JupyterLite docs > adding other kernels: https://jupyterlite.readthedocs.io/en/latest/howto/configure...

A bit lower level, but possibly now with graphene FET transistors:

From "A carbon-nanotube-based tensor processing unit" (2024) https://news.ycombinator.com/item?id=41322070#41322134 :

> "Ask HN: How much would it cost to build a RISC CPU out of carbon?"

"Show HN: RISC-V assembly tabletop board game (hack your opponent)" (2023) https://news.ycombinator.com/item?id=37704760