All this complexity, impressive, but still feels misguided. Nearly ten years ago Sun/Oracle put out the SPARC T7 that had 256 threads on a chip (October 26, 2015). x86 just managed that with the AMD Epyc 9754 (Jun 13, 2023).
How did they do that at 20 nm instead of 5nm ? Simpler cores.
Trying to improve single-threaded performance is really just adding epicycles and we need to just move onto more cores. Most of the time your CPU is just waiting, otherwise there wouldn't be all this focus on boost frequencies.
Slow it down it's reliably fed, get rid of the power throttling, because then it's not needed. Less surface area for bugs or attacks. An army of ants is a powerful thing.
The Phi is was many-core and not multi-core. It's a much harder paradigm to wrap your mind around. I do recommend learning about it for the new perspective. Try TIS-1000 by Zachtronics.
And we're still running desktop programs that rely on single-threaded performance,
remember that the Python GIL removal project only got up to speed in the past year(s) and that's not even mentioning a bunch of other workloads and legacies.
Sparc development could focus on servers and many of those tasks were easy to parallelize so of course they went for cores once they couldn't keep up on the frequency race (esp when selling expensive machines).
How did they do that at 20 nm instead of 5nm ? Simpler cores.
Trying to improve single-threaded performance is really just adding epicycles and we need to just move onto more cores. Most of the time your CPU is just waiting, otherwise there wouldn't be all this focus on boost frequencies.
Slow it down it's reliably fed, get rid of the power throttling, because then it's not needed. Less surface area for bugs or attacks. An army of ants is a powerful thing.